Applied Materials invests about $3B/year in R&D to enable semiconductor industry growth.

A critical part of the R&D process is exploring new materials, processes, transistor device architectures, design architectures, packaging and system architectures. Further, Applied Materials believes evaluating the PPACt impact of these innovations at the system level is an important part of the R&D Process. We have built engineering capability and developed a suite of productivity enhancement tools to drive R&D acceleration of Systems to Technology Co-optimization (STCO).

Ginestra

Materials-to-Device Optimizer


Link materials to device performance and reliability

iDRM

Design Rule Compiler


Faster, verifiable and easy-to-use path from design rule intent to DRC decks

SLiC

Standard Cell Library Compiler


Optimized library creation for DTCO and production – from months to days

DRVerify

DRC Runset Validation


Enabling fast, first-time-correct DRC decks for new process technologies

Contact us to learn how Sage Design Automation can help you accelerate design enablement for new process technologies.